Chalcogenide-based Phase Change Memories (PCM) have been studied for many years as a possible replacement for Flash memories, and in the late 2000s eventually hit the market as storage elements for cell phones [1]. Furthermore, being two-terminal devices incorporating selectors made of materials belonging to the chalcogenide class [2], they were easily integrated in 3D cross-point memory arrays [3–5], paving the way for storage-class memories thanks to their fast access time and moderate cost per bit.

After a suitable tailoring of the chalcogenide-alloy composition, to match the specs dictated by a specific use, embedded PCM have the potential to become key enablers of technological breakthroughs in a number of industrial applications; among these, automotive applications [6]. In recent years, PCM devices were also profitably employed in “non von Neumann” neuromorphic computing architectures, exhibiting a better performing collocation of memory and processing [7–10].

Whatever application for PCM devices is envisaged, their working principle relies on the fast and reversible structural change of a chalcogenide alloy that switches between the amorphous (reset) and crystalline (set) states, upon the application of an electric pulse [11–14]. In many cases, a voltage pulse of suitable intensity, and width of a few ns is required to surpass, first, an Ovonic Threshold Switching (OTS) event, namely an off-to-on threshold switching in the amorphous state, precursor of the amorphous-to-crystalline phase change. As pointed out by many scientists [15–17], the lower limits of a fast electrical switching for both selectors and memory elements based on chalcogenides are related to the above-described transition from low-to high-conductivity states of the amorphous phase, and to the crystallization kinetics starting from the amorphous phase [16].

On the theoretical side, even though the first speculations date back to the 1970s [18], the scientific debate is still alive even 40 years later [12]; accurate and handy ab-initio molecular-dynamics simulations and/or density-functional calculations for a number of chalcogenide alloys have been published only recently. They allow one to speculate about the connection between the change of conductivity observed when OTS (and, subsequently, phase change) sets in, and the structural changes of the materials at the atomic level induced by the application of an external bias. Even though the quantitative results depend on the types of atoms forming the particular alloy and on the alloy stoichiometry, some interesting general concepts have been evidenced. A large conduction-band tail of localized states is detected in Ge-rich Ge _x Se_1−x and in similar systems [19,20]; this is correlated to the nonlinear conduction features of OTS, whereas in Se-rich Ge₃₀Se₇₀ the Ge valence-alternating pairs and Se lone pairs dominate [20]. A different interpretation has been proposed based on the so-called metavalent bond; specifically, the extent of localization of electronic states is found to depend on the applied electric field: localized states of the amorphous chalcogenide transform into extended states [21,22], this eventually reducing the amount of charge traps and increasing the electric conductivity. However, the direct in situ observation of the above-mentioned structural features of the OTS switching still remains a challenge due to technological limitations.

A useful parameter that has been introduced by experimentalists to quantify the transition speed is the so-called delay time t _d , defined as the time interval between the instant at which the applied voltage exceeds the threshold value and the instant at which a steep rise in the device current begins [23,24]. Despite efforts to decrease t _d with different strategies, so far it has been difficult to obtain values below 1 ns [23]. Thus, achieving sub ns threshold-switching times for nanoscale devices is a goal of both scientific and technological relevance [23,25].

The exploitation of the electrical threshold switching property of many chalcogenide-based devices, for designing phase-change memory devices with access speed comparable to the SRAM, pushed experimentalists to design accurate measuring setups [26]. The latter must be able to respond to very fast external electric pulses, in order to precisely record the onset of the threshold switching and the change of the current value from the low value of the amorphous off state to the high value of the amorphous on state. A major attempt to provide new experimental insights into the threshold-switching mechanism by means of a precise knowledge of the exact shape of the voltage applied to the chalcogenide cell has been carried out by Salinga and coworkers [23]. According to the Authors, in the reported experiments on GST-225 devices, due to the careful impedance matching of the contact board the applied voltage pulses reach the memory cell without any significant distortion. Measurements were performed where the applied voltage signal, aimed at producing the threshold voltage, ramps up linearly from zero to a maximum value; the leading edge of the voltage ranges from few ns to 104 ns. The value at which threshold switching appears depends upon the steepness of the ramp; in particular, short rise times of the latter lead to high switching voltages, whereas the application of slow ramps produces a decrease in the switching voltage. Thus, the pulse shape strongly influences the switching voltage, so that the concept of a unique voltage at which the resistance of the cell falls becomes questionable [23,24].

This concept is pushed even further in a recent paper by Saxena and coworkers [25], where it is shown that delay times in the ps scale can be obtained in GST-225 cells by means of an appropriate design of both the experimental apparatus and the external voltage applied to the cell. In particular, the Authors measured delay times shorter than 50 ps for a voltage equal to twice the threshold voltage measured in static conditions for the same material, proving that PCM memory devices can reach SRAM-like speeds. Besides the technological implications of the above-mentioned performances, experimental measurements of Ovonic threshold switching in the time domain provide new interpretation challenges to test the existing theories about the switching mechanism; such theories have been formulated mainly by Academia over the last 5 decades in parallel with the technological developments. While, in the low-resistance state, the standard description of conduction in semiconductors applies, the electric properties of the high-resistance state are explained as a hot-carrier effect [27–30], or a combination of electro-thermal effects [31,32]. Experiments where the parasitic effects have been reduced as much as possible confirm the relevance of hot-carrier phenomena on OTS, even though the high thermal efficiency and the fast thermal dynamics in nanoscale devices suggest that the heat flow dynamics can indeed play a role [32].

As for the OTS effect in the amorphous phase, structural analyses and Molecular-Dynamics simulations of amorphous chalcogenides confirm the existence of a number of trap states located around mid gap, that play a fundamental role on the onset of the electrical switch [13,14]. At low fields (below threshold) the majority of carriers are trapped and the conduction is very low; when the field is strong enough to heat the carriers, the population of the high-energy, high-mobility states is enhanced. This, in turn, increases the energy gain of the trapped carriers at the expense of the field, further enriching the population of the trap states close to the conduction-band edge (and, possibly, also band states [30]): in this way a positive feedback is established which, eventually, makes the current to increase by several orders of magnitude.

In this paper we apply a space- and time-dependent theoretical model based on a trap-assisted charge transport in the amorphous phase of a chalcogenide material [33,34], to interpret the available experimental results in the ns–ps time domain for the electric current of nanoscale devices, based on the GST-225 chalcogenide, in a variety of bias conditions. A numerical solution of the constitutive equations of the model for a time-dependent bias makes it possible to test to what extent the threshold voltage depends upon the microscopic characteristic times that regulate the field-to-carrier energy transfer; this transfer is in fact responsible for the carrier heating which, in turn, produces the threshold switching. Furthermore, the analysis is extended to include the effect of the external circuit on the electrical switching, with reference to the optimised electrical set up configurations recently used by experimental groups [25].

Section 2 summarizes the main features of the theoretical approach; the set of equations which constitute the model for the OTS device, and the numerical algorithm implemented for solving them, are described in Sections 2.1–2.3, while Section 2.4 illustrates how we modeled the OTS device coupling with an external circuit that represents the measuring equipment. Dynamic and static models for the OTS device have been tested in view of their possible implementation into a device simulation framework. Section 3 contains our results and their critical analysis: first, parasitic effects are neglected; the ideal cases of a voltage step (Section 3.1) and of voltage trapezoidal profiles, similar to those reported in [25], are considered with the purpose of evaluating the delay time of the OTS device (Section 3.2); then, the more realistic condition of a voltage trapezoidal profile applied to a device in presence of parasitic effects is studied (Section 3.3). Finally, Section 4 summarises the main achievements of the analysis, and provides some comments about possible developments of the present approach.

The analysis aims at interpreting the experimental current-voltage curves obtained by applying time-dependent voltages with a time scale ranging from the nanoseconds to the picoseconds. Based on a thorough study of the Ovonic threshold switching by the Authors of the present paper and others [27,33,34], the theoretical approach assumes that, when the chalcogenide material is in the amorphous phase, carrier heating due to energy transfer from the external field dominates over thermal effects in determining the OTS. Accordingly, the heat equation for the lattice is not included in the model.

The experimental evidence is for a unipolar conduction in GST-225 ([14], Ch. 2). This suggests that carrier excitation from trap to band states prevails over carrier transfer from the valence to the conduction band via trap states in the energy gap [18]. The present model equally applies to electrons or holes; for the sake of simplicity we developed and discussed the model only for the case of electrons. Carriers can occupy two trap levels with energy values E _T = 0 and E _B = Δ, with density of states g _T and g _B , respectively. Carriers in level E _T are trapped, i.e., have zero mobility and, therefore, do not contribute to the current; carriers in level E _B mimic conduction electrons, even though they have a unique well-defined energy, and contribute to the current with a constant mobility μ. The use of a single energy level for the mobile states is in fact a simplification of the model; however, a sensible description of the physics is anyway achieved [33]. The introduction of a dispersion relation of the mobile states improves the quantitative description of the electric switching at and above threshold, without altering the key features of the present implementation [30].

The device dynamics is assumed to be one-dimensional: the cross section of the sample is supposed large enough to neglect the effects of the lateral boundaries. Thus, the physical quantities of interest along the device are functions only of the longitudinal coordinate x and of time t; they are the electric field F, the total concentration of carriers n, the concentration of mobile carriers n _B , the concentration of carriers in the trap states n _T , and the particle current density j. The above quantities are not all independent from each other; in fact, j = n B μ F − D B ∂ n B ∂ x , n = n T + n B , (1) where D _B is the diffusion coefficient of the mobile electrons, assumed here to be given by the equilibrium Einstein relation D _B = μ k T ₀/q, with q the carrier charge, T ₀ the room temperature, and k the Boltzmann constant. At equilibrium, the device is assumed to be spatially uniform, with an electron density n ₀ neutralized by an equal density of opposite fixed charges. Furthermore, assuming Maxwellian distributions, the densities of carriers in the traps and in the mobile states are given by n T 0 = C 0 g T exp − E T k T 0 = C 0 g T , n B 0 = C 0 g B exp − E B k T 0 = C 0 g B exp − Δ k T 0 . (2)

The normalization constant C ₀ is obtained from the total electron density n ₀, leading to: n T 0 = n 0 1 + g B / g T exp − Δ / k T 0 , n B 0 = n 0 1 + g T / g B exp Δ / k T 0 . (3)

In presence of an electric field F (x, t), electrons gain energy; furthermore, the excitation energy to reach the upper level is reduced by the field according to the Poole model [35], to become Δ ′ x , t = Δ − γ | F x , t | , (4) with γ a suitable constant ¹ . Out of equilibrium we assume that an electron temperature T _e (x, t) is defined, such that the electron populations, in analogy with Eq. 3, read n ̃ T x , t = n x , t 1 + g B / g T exp − Δ ′ / k T e , n ̃ B x , t = n x , t 1 + g T / g B exp Δ ′ / k T e . (5)

It is worth noting that a variation of the electric field F (x, t) is instantaneously accompanied by a variation of the activation energy Δ′, while the carriers require some time to adjust their occupations to the new situation. Thus, the above quantities n ̃ B ( x , t ) and n ̃ T ( x , t ) are to be considered “tendential” values [34].

The voltage pulse generated by experimental equipments varies from zero to its maximum programmed value in a finite time which, at present, can be as short as few ns [23,25]. Thus, every “real” voltage pulse contains, de facto, ramps with rise and fall times of finite duration; this implies the existence of a time transient of the electrical response of the device, during which the internal electric field increases or decreases. This effect may or may not be relevant according to how the rise time compares with the time scale of the microscopic processes responsible for the carrier heating at the origin of OTS, and whether or not the maximum voltage applied to the device exceeds the threshold voltage for the Ovonic switch. The simulations discussed in this section explore different physical situations of a GST-225 chalcogenide device, starting from ideal cases where circuit parasitic elements are absent and the external pulses have negligible rise times, then moving towards conditions closer to reality. The study is intended to test our theoretical model, based on hot-carrier effects, against experimentally-detected electric properties of amorphous chalcogenides, on time scales around and below the nanosecond, obtained from the last experimental results appeared in the literature [25]. In absence of information about the cross-sectional area of the devices employed in the experiments, the value 5, 000 nm² has been used in all simulations to convert current densities obtained from the simulations into charge currents.

The delay time of the OTS onset, i.e., the delay between the instant at which the external voltage applied to the chalcogenide cell equals the static threshold voltage and the instant at which a steep rise of the current through the OTS device occurs, is a quantity that is strongly influenced by the time dependence of the applied voltage. This effect has been studied in this paper by means of theoretical approaches of different complexities, all based upon the assumption that OTS is mainly due to electronic effects.

A purely microscopic model based on a trap-limited transport scheme with appropriate microscopic parameters provides delay times below the ns limit, as recently measured in GST-225 cells [25]. The availability of new experimental results for this chalcogenide in the ns–ps time domain allows for a better tuning of the microscopic parameter τ _n , which greatly improves the theoretical quantitative results for the delay time with respect to our previous work [30,34]. Parasitic effects do not produce a noticeable increase of t _d , at least for suitably optimised, electrical-test systems like those used in advanced experiments. Based on the simulation tests performed with detailed microscopic models, an analytical, computationally efficient approach has been developed which captures the key features of the voltage-dependent transient characteristic of OTS devices, and is suitable for implementation into device-simulation tools.

The simulated transient currents are in substantial agreement with the experimental values obtained with similar external bias voltages, this confirming the existence of delay times in the sub-ns time scale on the basis of the physical process of carrier heating due to energy transfer from the external field. Analytical calculations confirm that, for realistic values of the parasitic parameters, the internal relaxation times of the PCM provide a non-negligible contribution to the delay time t _d .