Is a 4-Bit Synaptic Weight Resolution Enough? – Constraints on Enabling Spike-Timing Dependent Plasticity in Neuromorphic Hardware - Pfeil, Thomas; Potjans, Tobias C.; Schrader, Sven; Potjans, Wiebke; Schemmel, Johannes; Diesmann, Markus; Meier, Karlheinz (Frontiers in Neuroscience, 2012)
Large-scale neuromorphic hardware systems typically bear the trade-oﬀ be- tween detail level and required chip resources. Especially when implementing spike-timing-dependent plasticity, reduction in resources leads to limitations as compared to ﬂoating point precision. By design, a natural modiﬁcation that saves resources would be reducing synaptic weight resolution. In this study, we give an estimate for the impact of synaptic weight discretization on diﬀerent levels, ranging from random walks of individual weights to computer simulations of spiking neural networks. The FACETS wafer-scale hardware system oﬀers a 4-bit resolution of synaptic weights, which is shown to be suﬃcient within the scope of our network benchmark. Our ﬁndings indicate that increasing the resolution may not even be useful in light of further restrictions of customized mixed-signal synapses. In ad- dition, variations due to production imperfections are investigated and shown to be uncritical in the context of the presented study. Our results represent a general framework for setting up and conﬁguring hardware-constrained synapses. We sug- gest how weight discretization could be considered for other backends dedicated to large-scale simulations. Thus, our proposition of a good hardware veriﬁcation practice may rise synergy eﬀects between hardware developers and neuroscientists.