LLC converters are widely used in server power supply (Lee et al., 2016; Ahmed et al., 2019), light-emitting diode (LED) drivers (Wang Y. et al., 2016), electric vehicle charging (Wang X. et al., 2016; Lin et al., 2023), renewable energy systems (Tayebi et al., 2019), and solid-state transformers (Zhang et al., 2021) due to the high conversion efficiency brought by its soft-switching characteristics. The secondary side rectifier diode conduction loss is one of the major losses (Yang et al., 2013) through the analysis of the conventional LLC topology loss. Synchronous rectification (SR) has a pivotal role in improving the efficiency of LLC converters. SR technology is to use MOSFETs instead of rectifier diodes. The MOSFET is turned on when rectified current passes through, while the MOSFET is turned off the rest of the time. Since the MOSFET has a small on-resistance, the large loss of the on-resistance on the diode is significantly reduced. As a result, the conversion efficiency is improved. Recent years have seen a considerable increase in the literature concerning the SR driving strategies of LLC converters.

The reported SR driving strategies can be divided into the following four categories: current-driven method, sensorless model-based method, v D S sensing method, and method for high voltage sensing. The basic principles and precautions of the four methods are illustrated in Figure 1.

The first category of SR driving strategies is the sensorless model-based method. Zhu et al. (2021) built a mathematical model to determine that the turn-on instant and conduction time are adjusted adaptively. Li et al. (2021) built mathematical models based on the LLC equivalent impedance to calculate the SR on-time in the forward and reverse modes. Li et al. (2022) built a mathematical model to calculate the SR conduction time online in the forward and reverse modes and to determine the SR turn off instant considering the switching frequency and load. These schemes can modulate the SR control signal with high accuracy in the steady state. These solutions can reduce the cost by eliminating additional sensors; however, the theoretical models of these schemes are complex, leading to a high computational burden on the controller.

The second category is based on detecting primary or secondary side currents. A method to directly drive the SR based on the secondary current is proposed in Xie et al. (2001). The advantage of the direct driving strategy its simplicity and accuracy, and the strategy can be used in different working modes without additional driving power. In Kim et al. (2012), an SR scheme based on the primary side current drive of the transformer is introduced. By generating an auxiliary current source, the magnetizing current ( i L m ) can be separated from the resonant current ( i L r ), which can be used to generate SR drive signals. The large current passed by the current sensor will lead to a sizeable primary loss of the sensor. In addition, considering the large volume of the sensor, it may not be suitable for cases requiring high power density. Since self-driven SR is needed, it may not be practical in light-load situations.

The third category of the existing technology is the v D S sensing methods. Since the voltage drop of the rectifier is different when the diode is turned on and the MOS is turned on, this difference can be used to generate SR signals. Due to the stray inductance of the MOS package, the v D S will reach the turn-off voltage faster, which results in the early turn-off of SR signals. To solve the problem of inaccurate turn-off time caused by stray inductance, the following two methods are adopted.

One method is to use an RC circuit to compensate for the stray inductance. Fu et al. (2009) used resistors, capacitors, and switches, and the conduction of the SR body diode was almost 0. A compensation circuit based on resistors, capacitors, and diodes was proposed by Wang et al. (2010) and Wang and Liu (2014), which can realize the compensation function more reliably and simply. However, this method needs to obtain an accurate SR parasitic inductance value to set the RC compensation circuit. At the same time, the compensation circuit may require a small switch MOS, which will increase the complexity of the system.

Another method is the use of an adaptive control strategy. The method was introduced by Qian et al. (2022) to improve reverse current. Moon et al. (2019) proposed an adaptive control method based on the last dead time measurement to realize the SR function. Measurement of dead time and a high-speed controller are also needed. The method proposed in Fei et al. (2018) is synchronized with the primary side, in which the switch-on point is at the primary side’s turn-on time, and the switch-off point is based on the automatic adjustment process. The main advantage of this method is that it reduces the controller requirements through ripple measurement. These methods may introduce system reliability issues, which may lead to shoot-through. MOS changes in on-time may also introduce loss.

The last category is the high-voltage sensing method. In Hsu et al. (2019), the synchronous rectification function is realized by integrating and comparing the resonant capacitor voltage ( v C r ). The resonant capacitor voltage is a large voltage signal and, therefore, insensitive to interference. But integrators and comparators complicate the converter. In Mohammadi and Ordonez (2019), the half-bridge mid-point voltage and the polarity of the transformer voltage are sampled and compared; when the rectifier voltage polarity is the same as the input voltage polarity, the SR should be turned on. However, due to the limitation of circuit parasitics, the oscillation of the rectified voltage will make it difficult to judge the polarity, especially at high frequencies.

To resolve the aforementioned challenges of LLC converters, an SR strategy for LLC resonant converters based on the resonant inductor voltage ( v L r ) is proposed, referred to as synchronous rectification based on the resonant inductor voltage (SR-RLV).

The principle of this method is shown in Figure 2. This method can judge the working stage of the LLC resonant converter by measuring the value of the resonant inductor voltage ( v L r ). The resonant inductor voltage ( v L r ) value and the jump direction are used to derive the working stage of the circuit. The SR strategy is established by judging the current stage and calculation stage duration, and the SR function of the LLC converter is realized.

The proposed RLV strategy can turn on the SR MOS accurately and quickly and improve the conversion efficiency of the LLC converter. The inductor voltage v L r is large voltage amplitude, and the anti-interference performance is excellent. The strategy can work in the wide frequency range of the resonant converter. At the same time, the issues of bulky size and high cost caused by using a current transformer SR method are solved.

Section 2 describes the detailed steps of operations, which demonstrate that the RLV method covers a wide operating range of frequencies from below to above and loads from heavy to light. The realization of a driving strategy based on RLV-SR is also introduced in this section. In Section 3, experimental results are presented to verify the effectiveness of the proposed RLV method. The conclusion is provided in Section 4.

To illustrate this method, the LLC topology circuit is shown in Figure 2. A full-bridge structure is adopted for the inverter part, and the rectifier part is a half-bridge structure. The system inverter part Q1/Q4 is a group of identical signals, and Q2/Q3 is a group of identical signals, which are sent out by the controller as known signals.

The implementation of the proposed driving scheme is shown in Figure 3. The resonant inductor voltage v L r and the output voltage V o u t are input signals, which are input to the high-speed A/D converter through the signal conditioning circuit of the operational amplifier. The A/D conversion results are given to the FPGA module. The MOS drive signal on the primary side is also used as the input of the FPGA module.

The FPGA module uses the RLV-SR strategy to determine the PON stage according to v L r and V o u t and the driving signals of the primary side. Simultaneously, the duration of the P stage ( t s t a g e _ p ) and the duration of the N stage ( t s t a g e _ N ) are measured. The on and off period of the SR signal is determined according to the RLV algorithm.

Before the SR drive signals are output, some output limits are set to avoid MOS shoot-through. When the upper and lower transistors of the SR signal are turned on, a dead time is set to prevent the MOS from being shoot-through. At the same time, when V o u t drops below the safe range, the DSP will turn off all MOS to avoid short-circuiting.

For LLC converters, according to the relationship between the current i L r flowing in the resonant inductor and the current i L m in the magnetizing inductance, the operating modes can be divided into three categories: P stage, N stage, and O stage. If i L r > i L m , the system is in the P stage, and the equivalent circuit is shown in Figure 4A, the upper half of the rectifier part is turned on, and the equivalent voltage is n V o u t .

If i L r = i L m , the system is in the O stage, and the equivalent circuit is shown in Figure 4B, the resonant inductor Lr and the magnetizing inductance Lm participate in the resonance together, no current flows in the rectifier part, and the voltage source on the right is 0.

If i L r < i L m , the system is in the N stage, and the equivalent circuit is shown in Figure 4C, the lower half of the rectifier part is turned on, and the equivalent voltage is reversed, which is − n V o u t .

The RLV-based SR signal needs to be completed through the following steps.

Step 1:

Measure the resonant inductor Lr voltage v L r of the LLC resonant converter and the system output voltage V o u t in real time.

Step 2:

Judge the working stage of the LLC converter according to the value of v L r before or after the edge time of the primary-side control signals V Q 1 and V Q 2 and the value of v L r at the jumping time. The specific working stage judgment method is described in detail later.

Step 3:

Measure the duration of the P stage ( t s t a g e _ p ) and the duration of the N stage ( t s t a g e _ N ) according to the circuit working stage.

Step 4:

Using the current working stage obtained in Step 2 and the duration of each stage measured in Step 3, under the condition that the system output voltage is stable and the system output frequency is stable, output the synchronous rectification signals V S 1 and V S 2 .

When the system enters the P state: V S 1 = 1 , V S 2 = 0 , when t = t s t a g e _ P , V S 1 = 0 , V S 2 = 0 .

When the system enters the N state: V S 1 = 0 , V S 2 = 1 , when t = t s t a g e _ N , V S 1 = 0 , V S 2 = 0 .

When the system is in the O state: V S 1 = 0 , V S 2 = 0 .

If the system output voltage or system output frequency is unstable, waiting for stabilization is needed to output the SR signal.

In Step 2, the current working stage of the resonant circuit needs to be judged, and the judgment method is different under different working frequencies. The RLV-SR strategy will be introduced from three aspects: the resonant converter works below the resonant frequency, above the resonant frequency, and under light-load conditions.

This section presents the experimental results of the proposed RLV strategy based on Table 1. This 100-W/24-V LLC converter is used to provide isolation for single-board power supplies. The RLV-SR strategy is compared with the conventional V D S − o n sensing scheme. The comparisons are carried out in the mode below the resonant frequency, above the resonant frequency, and in the light-load mode, respectively.

The experimental converter is shown in Figure 9. A full-bridge inverter on the primary side is controlled by the DSP controller. The RLV-SR control function is completed by the FPGA controller, and the driving signal of the SR is determined by collecting v L r , V o u t , and the main switching signal of the primary side. The key components are shown in Table 2.

Four voltage signals were given in the experimental result figures. While V Q 1 is the primary-side control signal, V S 1 is the synchronous rectification control signal of MOS S1, V D S − S 1 is the DS voltage signals of MOS S1, and I S 1 is the current signal of MOS S1.

In the below resonant frequency region, the converter operates at the same load and frequency, the results of the conventional V D S − o n method are shown in Figure 10A, and the proposed RLV strategy is shown in Figure 10B.

As shown in the bottom part of Figure 10A, V D S − S 1 is zoomed. Due to stray inductance, the V D S − S 1 voltage leads I S 1 and reaches the voltage zero point before the rectified current is 0. At this time, the SR turn-off signal is triggered, and then the body diode of the MOSFET is on, which will cause premature turn-off of the system.

Unlike the conventional V D S − o n sensing method, the RLV-SR driving strategy does not use the V D S . The RLV strategy is based on v L r and V o u t is a large signal and cannot be disturbed. Therefore, as shown in Figure 10B, the work stage of the converter can be judged by the jumping edge of the v L r signal and the output voltage signal V o u t . Then, according to the state and the duration of this state, determine the timing of turning on and turning off the SR signals. V S 1 is the SR control signal and I S 1 is the current flowing in the rectifier MOS. V S 1 is turned on when the system enters the P state and turned off at the zero-crossing time of I S 1 . The RLV-SR driving strategy can well-realize the function of SR function.

In the operating range above the resonant frequency, when the converter operates under the same load and frequency, the conventional V D S − o n sensing strategy and the proposed RLV strategy are compared. The key waveforms are shown in Figures 11A B.

When the operating frequency ( f s ) of the system is nearby or above the resonant frequency ( f r ) of the LLC converter ( f s ≥ f r ), the proposed RLV-SR strategy generates the dead time between the two SR switches to avoid shoot-through. The inserted dead time (DT) should be long enough to ward off shoot-through of MOS. In the experimental results, 20 ns dead time (DT) is inserted, and this is 0.1% of the resonant period while f s = 50 kHz.

It can be seen in the upper part of Figure 11A that V D S − S 1 is close to 0 while I S 1 is greater than 0. The V D S − S 1 signal is amplified, as shown in the lower part of Figure 11A. The control signal V S 1 of the SR MOSFET S1 can be turned on when the current is greater than 0, but due to the existence of stray inductance, the V D S − S 1 signal reaches the threshold voltage in advance, while the current in the MOSFET is still 2.3 A at this time, which will reduce the conversion efficiency.

As shown in Figure 11B, when the converter operates in a mode above the resonant frequency, the RLV strategy effectively determines the zero-current crossing point by detecting the jump edge of V L r and the operating state of the system.

When the load of the converter is light, the output power of the system is 20 W, and the system works at 36 kHz. The experiment results are shown in Figure 12. The traditional V D S − o n sensing strategy and the RLV-based strategy are compared when the output is 20 W.

As shown in Figure 12A, the conventional V D S − o n sensing strategy can turn on the V S 1 control signal when I S 1 just crosses the zero point. However, when it comes to V S 1 off time, due to the existence of stray inductance, premature off-time can be observed from the signal of V D S − S 1 zoomed in the lower part of Figure 12, which is ahead of the I S 1 signal. It is turned off when I S 1 is 0.8A, after which the MOSFET body diode is turned on. This will miss about 20% of the on-time, which is not conducive to the improvement of system efficiency.

On the contrary, with the RLV-based strategy, the system state can be accurately judged by the magnitude and jump edge of the V L r voltage signal. As shown in Figure 12B, the on and off points of the SR signal V S 1 are synchronized with the timing when the I S 1 current is turned on and off.

The RLV-SR strategy tracks the actual rectifier current conduction time instantaneously under severe current dynamics. The input voltage of the experimental system is fixed. Therefore, the dynamic response results are shown while the load is changed dramatically. The results when the load condition steps up from 20 W to a load of 66 W are shown in Figure 13A. In the figure, I_S1 represents the output current, and V_S1 represents the driving signal of SR MOS. There are no spikes in the dynamic waveforms, which means the SRs can operate safely. To regulate the output voltage, the S1 peak current steps up from 3.8 A to 12 A. Figure 13B shows the load step-down response from 62 W to 20 W with a step-up increase in S1 peak current from 3.8 A to 12 A. The zoomed-in figure shows the waveforms after transients. It can be seen that the conducting time of SR can be tracked properly during the transients with the proposed driving scheme.

The experimental results verify that the RLV-based synchronous rectification strategy can effectively cover the operating range from below to above the resonant frequency and can also cover the working scenarios from light load to heavy load. Compared with the conventional V D S − o n sensing scheme, the conversion efficiency is improved by improving the accuracy of the MOSFET off time.

A comparison of the different schemes is shown in Table 3. The proposed RLV strategy does not require current sensors, which may introduce volume and cost issues. Although the proposed strategy contains one voltage sensor, it shows excellent performance in low extra power losses, low noise sensitivity, and low circuit, resulting in high SR accuracy and high efficiency. To summarize, the proposed SR scheme achieves better performance than most of the existing SR schemes of the LLC resonant converter to some extent.

As shown in Figure 14, the converter achieves a peak efficiency of 92.45% with an improvement of 0.5% at 50 W compared to the conventional driving scheme because the current over zero point can be determined by detecting the jump edge of VLR and the operating state of the system.

In this paper, an RLV-SR strategy is proposed. This RLV-SR strategy does not use a current sensor, and the working stage of the LLC converter is judged by measuring the magnitude and jump time of the v L r signal, which is used to output the corresponding SR signals. The function and effectiveness of this strategy are verified by the experiment with a 100W/24V LLC converter.

Compared with the conventional V D S − o n sensing strategy, this strategy has better anti-interference performance. More importantly, the method can operate in various modes, including below and above the resonant frequency and in light-load mode. The RLV-SR driving strategy dramatically reduces the turn-on time error caused by the effect of stray inductance. So, the efficiency of the power converter is improved by 0.29% at full load.

Therefore, the RLV-SR strategy proposed in this paper is a simple and effective method to realize the synchronous rectification function of the LLC resonant converter.