The conventional three-phase CSI is also named as H6-CSI, the topology is shown in Figure 1. It usually uses a voltage power supply and a DC-link inductor to achieve the approximately constant current source I _dc. H6 inverter bridge can realize the current commutation and output the three-phase switched currents i_a, i_b, i_c. After the AC filter capacitor C_a, C_b, C_c, the output currents are i_ao, i_bo, i_co. For high-power CSI, H6 inverter bridge is mainly composed of six low-speed power switches (e.g., GTOs, IGCTs) (Xu et al., 2023). When IGBTs are selected, it requires series connected power diodes to increase the reverse-blocking (RB) capability.

At any moment during modulation, there are two switches conducting ON, one on the upper arms (S₁ or S₃ or S₅), and another on the lower arms (S₄ or S₆ or S₂). And CSI adopts lateral commutation mode among the bridge arms. There are nine switching states in total, six of which are active states ({S₁, S₂}, {S₁, S₆}, {S₂, S₃}, {S₃, S₄}, {S₄, S₅}, {S₅, S₆}), the rest three are null states ({S₁, S₄}, {S₂, S₅}, {S₃, S₆}). It is worth noting that the null states actually behave as short-circuit status of the circuit, which is also denoted as the short-circuit pulses in this paper.

The SHEPWM method can remove low-order harmonics from the inverter’s output by setting the appropriate angles of switching operation. The conventional CSI SHEPWM method is implemented by introducing short-circuit pulses and setting transitions, which is completely different from VSI SHEPWM. Literature (Karshenas et al., 1995) have investigated and listed these differences in the SHEPWM between VSI and CSI in detail.

The operational steps of SHEPWM of conventional CSI are as follows. Step 1: select the low-order harmonics to be eliminated, and set the number of switching angles. N is the number of switching angles and also represents that (N-1) harmonics can be eliminated (e.g., setting N = 5 means to eliminate the harmonics of 5^th, 7^th, 11^th, 13^th). It is worth noting that, to maintain the continuity of the current, the switching angles should be set within (0, π/6). Step 2: build the pulse sequences. The characteristic of this scheme is that the driving signals of switches (S₁ ∼ S₆) lags π/3 in turn and the output waveform of three-phase current i_a, i_b and i_c lags 2π/3 in turn. Step 3: formulate the output current i(ωt) expression, which owns the features of half-wave symmetry and quarter-wave symmetry. Fourier decomposition is performed on the output current i(ωt). The decomposition formula is shown as Eq. 1, where I _a,n is the amplitude of n^th order harmonic of the output phase current i_a, and I _a,n can be calculated by Eq. 2. i ω t = ∑ n = 1 ∞ I a , n sin n ω t (1) I a , n = 4 π ∫ 0 π 2 i ω t sin n ω t d ω t (2)

Denote the amplitude of the fundamental current as I _a,1 . Then, the modulation index m can be expressed by Eq. 3. Thus, the switching angles under different modulation index can be solved. m = I a , 1 I d c (3)

The following takes N = 7 and N = 9 as examples to explain the specific implementation method. When N = 7, the harmonic orders to be eliminated are 5^th, 7^th, 11^th, 13^th, 17^th, 19^th. Therefore, seven switch angles are set (α₁, α₂, α₃, α₄, α₅, α₆, α₇). The specific pulse sequence in a quarter of one period is shown in Figure 2A. The driving sequence of each power switch has four short-circuit pulses in one period. I _a,n can be formulated as Eq.4. Using Eq. 3 and Eq. 4, and set I _a,n = 0 (n = 5, 7, 11, 13, 17, 19), the switching angles can be solved out. I a , n = 4 I d c n π c o s n α 1 − c o s n α 2 + c o s n α 4 − c o s n α 5 + c o s n α 7 − cos n π 6 + c o s n π 3 − α 7 − c o s n π 3 − α 6 + c o s n π 3 − α 4 − c o s n π 3 − α 3 + c o s n π 3 − α 1 — c o s n π 3 + α 2 + c o s n π 3 + α 3 — c o s n π 3 + α 5 + c o s n π 3 + α 6 − cos n π 2 (4)

Similarly, when N = 9, to eliminate harmonic of 5^th, 7^th, 11^th, 13^th, 17^th, 19^th, 23rd, 25^th, the n^th harmonic expression of the output current can be formulated as Eq.5. The specific pulse sequence in a quarter of one period is shown in Figure 2B. Compared to the previous sequence (N = 7), the driving pulses (N = 9) of switch S₁ ∼ S₆ become denser and have introduced more short-circuit pulses in one period. I a , n = 4 I d c n π c o s n α 1 − c o s n α 2 + c o s n α 4 − c o s n α 5 + c o s n α 7 − c o s n α 8 + c o s n π 3 − α 9 − c o s n π 3 − α 8 + c o s n π 3 − α 7 − c o s n π 3 − α 6 + c o s n π 3 − α 4 − c o s n π 3 − α 3 + c o s n π 3 − α 1 — c o s n π 3 + α 2 + c o s n π 3 + α 3 — c o s n π 3 + α 5 + c o s n π 3 + α 6 − c o s n π 3 + α 9   (5)

The above is the modulation scheme under theoretical analysis and ideal conditions. In practical applications, the current of the switch can reflect the commutation process (Bernet et al., 1999). Since the power switch has turn-on time and turn-off time in actual operation, the current of the switch has a rising time (t_on) and a falling time (t_off), which are different from the ideal waveforms. The comparison between ideal and actual current waveforms are shown in Figure 3. The dwell time of an ideal driving pulse is recorded as t_s, and the dwell time of the actual switching pulse is recorded as t_a. Apparently, the effective pulse width of actual switching is shorter than the ideal setting dwell time. Therefore, the actual current rising and falling process can make the switching angles inconsistent with expectations.

Since high-power CSIs are employed with low-speed switches, the turn-on and turn-off process can last up to a few microseconds. Furthermore, with the increase of the modulation index as well as the number of switching angles, the drive pulses become denser. In particular, the shortest pulse width comes from the null state, so that the completion of the short-circuit pulses will be significantly affected by the commutation speed of switches. For example, when m = 0.96 and N = 9, the shortest pulse width occurs at the short-circuit states, which has a width of only about 29 μs. Therefore, conventional CSI who built with low-speed switches (e.g., GTOs, IGCTs) may have difficulty in the switching speed to keep up with the setting short-circuit pulses width, so that the output current cannot reach the expected performance.

In addition, to maintain the continuity of the DC link current, the overlap-time has to be introduced between two switching signals during commutation (Suroso and Noguchi, 2020; Liu et al., 2021). To guarantee the commutation of the low-speed switches is completed, the delay of switching pulses caused by the overlap-time cannot be ignored as well. If not properly set, this phenomenon at short-circuit states will greatly worsen the total harmonic distortion (THD) performance. Therefore, the configuration of overlap-time also need to be carefully considered in conventional CSI.

To improve the commutation speed of low-speed switches of SHEPWM-CSI, this paper proposes a new SHEPWM operational scheme based on the H7-CSI. The topology of the H7-CSI is shown in Figure 4. Compared to conventional CSI, the basic feature of the H7-CSI topology is the added shunt-connected seventh switch, which is the key to improve the inverter’s performance (Wang et al., 2018). The seventh switch is connected in parallel with the DC bus, which can be used to replace all the null states. Within 30° power factor angle range, when S₇ is turned on, the current will be quickly switched to this branch, and the remaining six switches can turn on/off with zero current switching (ZCS) capability.

In terms of hardware configuration, the six power switches in the H6 converter bridge retains the same (low-speed switches) configuration scheme as the conventional CSI. The key difference is that the seventh switch uses a high-performance power switch. This seventh switch should be characterized by high switching frequency and low loss, which can increase the inverter commutation speed while reducing switching loss. Available choices are high-speed RB-IGBT, or SiC MOSFET with Diode, etc. The reverse-blocking capability can be realized via series connected power diodes. Compared with the conventional all-hardware-update routine of CSI, the H7-CSI topological solution adopted in this paper can clearly reduce the hardware cost.

The basic idea of proposed SHEPWM solution is to use the seventh switch to help the commutation of other low-speed switches. The specific operating principles are as follows.

1) Select the low-order harmonics to be eliminated, set the number of switching angles, then build the pulse execution scheme of switch S₁∼S₆ and formulate the expression of the output current i (ωt), which is basically the same as the conventional SHEPWM-H6-CSI method.

The overlap-time optimization process is pictured as Figure 5. Because the null-state pulses of S₇ are inserted between two different active states (implemented by S₁-S₆), the adjacent turn-off and turn-on operation of S₁-S₆ can be extended with no impact to the output of the circuit. As shown in Figure 5, the original driving sequence is {S_x turn-off, S₇ turn-on} to {S₇ turn-off, S_y turn-on}. To optimize the driving signal, S_x should be delayed for shutdown, the delay time is denoted as t_d, while S_y should be turned on in advance, which is denoted as t_e. Both t_d and t_e should be set within (0, t_s). And the pulse width of S₇ itself remains unchanged. Doing so, on the one hand, it solves the overlap-time issue with no interference to the power quality, and on the other hand, the switching speed challenge of S₁-S₆ can get relieved.

Normally, the delay time and advance time are set as 1–3 μs. Under the premise of meeting the requirements of the rules, the delay time and advance time can be optimized according to the switching speed of the switch.

According to the operating principles described above, pulse sequences of N = 7 and N = 9 can be rebuild, as shown in Figure 6A and Figure 6B. The optimized overlap-time is represented by the shaded area in Figure 6.

The switching characteristics of the proposed SHEPWM scheme with H7-CSI and the conventional SHEPWM-H6-CSI are compared, as shown in Table 1. The proposed SHEPWM scheme basically uses S₇ to improve the commutation speed around the null states, which would be affected by the switching speed most. Since S₇ is characterized by fast switching speed and low switching loss, it is obvious that its actual performance is determined by the hardware selection of S₇.

As for the switching operation, compared to the conventional SHEPWM-H6-CSI, the total number of hard-switching counts of the proposed SHEPWM-H7-CSI is reduced by almost one-third. Moreover, most of the hard-switching transitions are implemented by S₇, which can further reduce the switching loss. In addition, because the implementation of null states uses less power devices, the conduction loss can also decrease. Therefore, it indicates that the proposed SHEPWM-H7-CSI solution can even perform better efficiency.

To compare the performance between conventional SHEPWM-H6-CSI and the proposed SHEPWM operational method with H7-CSI, simulation models have been set up using MATLAB with PLECS Blockset, where H6-CSI and H7-CSI are built with the same parameters. The simulation parameters are listed in Table 2.

The conventional H6-CSI using the SHEPWM method is first simulated. The power circuitry is established by PLECS Blockset, which can simulate the turn-on and turn-off process of the power switches. To simulate the behavior of the self-controlled low-speed switches while taking the actual capabilities of the simulation environment into account, the power switch S₁∼S₆ are built with the “IGBT with Limited di/dt model”, where the “rise time” and “fall time” are configured with 10 s of microsecond. Other parasitic parameters (such as the blocking voltage, stray inductance, on-resistance, etc.) are modeled after the datasheet of typical low-speed switches. MATLAB is used to implement the driving-pulse sequences and analyze the output waveform.

Figure 7A shows the comparison of the output switched current i_a (before the filters) at N = 7. The upper and lower waveforms represent the actual and ideal switched currents, respectively. A zoomed view of the two waveforms during (π/3, 2π/3) is demonstrated in Figure 7B. During this period, S₁ remains on state, and S₄ performs short-circuit pulses. As can been seen from the comparison, there exists a slight difference in the operating angles as well as the width of switching pulse. The same trend can also be found in Figure 8, which is the waveform comparison of the output switched current with N = 9. Therefore, the phenomenon of actual commutation difference caused by switching speed is reproduced.

Figures 9A,B shows the actual filtered output three phase currents and voltages of H6-CSI using the SHEPWM methods at N = 7 and N = 9, respectively. Figures 9C,D are the corresponding FFT analysis results. These simulation results show that with the increase of switching angles, the pulse sequences become denser. If the low switching speed is taken into account, the low-order harmonics will not be eliminated entirely, which has the high contents of 5^th and 7^th harmonics.

The following simulation are the verification of the proposed SHEPWM scheme based on H7-CSI method. The power circuitry of H7-CSI is also built in PLECS Blockset. Switch S₇ is set with a shorter turn-on and turn-off time than that of S₁∼S₆. Taking N = 7 as an example, the output three-phase voltage and current after the capacitor filters are shown in Figure 10A. And the harmonics of the output current i_a are analyzed by FFT which is shown in Figure 10B. When N = 9, the filtered output waveforms and harmonic analysis of H7-CSI are shown in Figures 10C,D, respectively. The contents of low-order harmonics to be eliminated have been compared and listed in Table 3, which can give a clear view of the harmonic differences. Observing from Figure 10, it can be found that the low-order harmonic contents are almost zero. Compared with the THD value of 58.26% for conventional SHEPWM-H6-CSI with low-speed switches in Figure 9C and Figure 10C, the THD value of proposed SHEPWM based on H7-CSI is 57.59% with the proposed modulation method. These THD values are 58.20% and 57.44% in Figure 9D and Figure 10D, respectively. It is worth noting that low-order harmonics content of 5^th and 7^th decreased significantly. To sum up, the low-order harmonics that to be eliminated are significantly reduced with the proposed solution. Therefore, the output power quality has been improved.

To verify the performance of the proposed SHEPWM strategy with H7-CSI, an experimental prototype is established displayed in Figure 11. The parameter experimental settings are shown in Table 4. On the controller board, the gating sequences are programmed and implemented by an FPGA of xc3s500e from the family of XILINX Spartan3E. In the power circuitry, the DC inductor, the output capacitor filter and the output resistive loads are consistent with the simulation model. To perform the low switching speed of power switches, S₁-S₆ are selected with modular IGBTs (FF100R12RT4 from Infineon), and the driving resistance is set with 40 Ω S₇ is employed by a silicon carbide power MOSFET (C2M0040120D from Cree).

Figure 12 shows the experimental driving pulses of switches S₇, S₂, S₆ respectively. In Figure 12, the modulation state sequence is from {S₁, S₂}, via {S₇}, to {S₁, S₆}. As expected, S₂ and S₆ switch much slower than S₇. To be specific, the turn-on and turn-off time of S₂ and S₆ are nearly 3 µs, while the switching speed of S₇ is less than 200 ns.

Set N = 7 for experimental verification, the gating pulses of switches S₁, S₅, S₆ and S₇ for one period are captured as Figure 13. It is easy to find that the experimental sequences are consistent with the theoretical settings, which have been presented in Figure 6. And the commutation features conform to the description in Table 1.

To go a step further, an additional experimental prototype of conventional H6-CSI with the same hardware has also been carried out to test and compare the harmonic performance. The experimental phase voltage, phase current and the current harmonic spectrum of conventional SHEPWM-H6-CSI with low-speed switches are shown in Figure 14A. The filtered voltage and current waveforms are basically complete sinusoidal waves. The burrs are due to the characteristics of low-speed switching operation. From the spectrum analysis, it can be clearly seen that the output current contains many harmonic components, and the harmonics of 5^th, 7^th, 11^th, 13^th still remains a certain content.

By contrast, Figure 14B shows the experimental output waveforms of the proposed H7-CSI with SHEPWM. The inverter also outputs 50 Hz sinusoidal voltage and current. Although the waveforms are not significantly different from that of H6-CSI, spectral analysis shows that the proposed SHEPWM strategy has less harmonic contents. The THD value of output current has decreased from 4.72% to 3.83%. And the low order harmonics (5^th, 7^th, 11^th, 13^th) have almost been eliminated successfully. Thus, the harmonic performance of CSI can be improved with the proposed method.