Front. Energy Res. Frontiers in Energy Research Front. Energy Res. 2296-598X Frontiers Media S.A. 765899 10.3389/fenrg.2022.765899 Energy Research Methods Design of Back-to-Back Converter Interface for Electric Spring in a Distribution System Deepika et al. Back-to-Back Converter for Electric Spring Deepika K. K. 1 * Kumar J. Vijaya 2 Pinni Srinivasa Varma 3 Sura Srinivasa Rao 4 Sankar R. S. Ravi 1 1 Department of EEE, Vignan’s Institute of Information Technology, Visakhapatnam, India 2 Department of EEE, ANITS College of Engineering, Visakhapatnam, India 3 Department of EEE, KLEF, Guntur, India 4 Department of EEE, GITAM Deemed to be University, Visakhapatnam, India

Edited by: Chandrasekhar Perumalla, Indian Institute of Technology Bhubaneswar, India

Reviewed by: Rui Wang, Northeastern University, China

Minh Quan Duong, University of Science and Technology-The University of Danang, Vietnam

 *Correspondence: K. K. Deepika, kkdeepika18@gmail.com

This article was submitted to Smart Grids, a section of the journal Frontiers in Energy Research

 23 03 2022 2022 10 765899 27 08 2021 28 01 2022 Copyright © 2022 Deepika, Kumar, Pinni, Sura and Sankar. 2022 Deepika, Kumar, Pinni, Sura and Sankar

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In a distribution system, the erratic output power of distributed generation causes fluctuations in the available power to critical loads on the demand side. A novel electric spring (ES) with back-to-back converter configuration is proposed. Besides PCC voltage regulation and power control, the proposed converter integrates the ES to the grid without compromising the DC link voltage and the quality of the grid current. It comprises an instantaneous DC link voltage control, active power control, PCC voltage control, and a hysteresis band current control. The systematic design of the parameters in the configuration is detailed. Simulations were performed in MATLAB/Simulink, and a series of comparative analyses at various control stages were demonstrated. The quality of the grid current was analyzed with PI, PR, and hysteresis band current controllers. It was established that the hysteresis band current controller gave the best performance. Similarly, the DC link voltage was efficiently regulated with the instantaneous DC link voltage controller than the conventional controller.

 electric spring back-to-back converter hysteresis band current controller distribution system voltage sag/swell 1 Introduction

With the unpredictable renewables inhabiting a major stake in energy market, there is a shift from “power generation following the load demand” to “load demand to follow the generation” termed as the demand side management (DSM) (Westermann and John, 2007). In smart grids, DSM plays an effective operational role to optimize cost, power system reliability, and stability, profiting both consumers and utility operators (Nolan and OMalley, 2015). So, to handle the irregularity at both the supply and demand ends, DSM provides feasible solutions by making necessary changes in load consumptions. The power consumption of some loads is adaptively varied to match the fluctuating renewable power (Palensky and Dietrich, 2011). These loads that can withstand large variations of voltage/frequency for a short duration without interruption to consumer load operation are called as non-critical loads (NCLs), mainly heating and cooling loads (Lee et al., 2011). On the contrary, some loads require to be operated at an almost constant voltage and power supply. These are referred to as critical loads (CLs), mainly the military, computer, and hospital loads.

In this regard, it is crucial to modulate the power of an NCL. At the same time, there must be an effective method to regulate the mains voltage and provide grid support. Both these objectives are met with an electric spring (ES), a demand–response technology embedded in an NCL implemented by Hui et al. (2012), Shuo et al. (2014), Tan et al. (2013), and Mok et al. (2016). For the practical applications of ES in a distribution system, the ES must be capable to control active and reactive power independently and effectively as demonstrated by Wang et al. (2018).

Yan et al. (2017) discussed about the voltage support and suppression mode of a back-to-back (B2B) ES. A comparison was made with the ES with a capacitor input operation, but it did not address the power control by a B2B ES. Zheng et al. (2017) focused on the consensus algorithm to coordinate multiple ESs for maintaining critical bus voltage in distribution systems. The voltage regulation of an electric spring with a B2B converter (ES-B2B) topology with NCLs was employed for an individual ES unit. The power control and balancing technique for the integrated configuration of the ES and PV system discussed in Khamis et al. (2019) concentrated on the active power consumption of ES-associated smart load but did not address the voltage control. Zha et al. (2019) implemented a bidirectional buck-boost converter (BBC) and a battery arrangement to ensure the stabilization of the mains voltage to the CL while keeping the state of charge of the battery within predetermined limits. FirdausMishra and Sharma (2019) employed a distributed control strategy for a smart load formed with electric water heaters. Its main objective was to limit the overvoltage caused by the reverse flow of PV power in a low-voltage distribution network. The load-shifting effect of the smart load was also discussed.

Unlike PV-grid configurations with a separate converter, there is a need for an ES converter circuit to perform both PCC voltage regulation and PV-grid interconnection. Khajehoddin et al. (2013) presented a control design approach for optimum dynamic response in single-phase grid-connected renewable converters with minimum energy storage component. It suggested a control system to provide an analytical design method to optimize both dynamic response and output current harmonics. Taghizadeh et al. (2018a) proposed a new way of implementing the notch filter, which allows the integration of its internal variables into the control loop. Taghizadeh et al. (2018b) presented a fast and robust DC-bus voltage control method for single-phase grid-connected DC/AC converters.

The research works explored in ES control did not take into account the control of the ES DC-link voltage. The DC voltage was assumed to be a fixed DC source with zero ripples, or it was realized with a battery bank. Conventional B2B converter control circuits consist of 3 control loops—PI controllers for the DC bus voltage control, current control and a phase-locked loop (PLL) to generate synchronization signal. In this research work, a novel B2B converter topology with full bridge inverters is formulated with the design of instantaneous DC bus voltage controller comprising a hysteresis band (HB) current controller and enhanced phase-locked loop (EPLL) to provide synchronized signals with grid voltage. In this work, the control objectives are as follows:

(1) To track the variations in the reference power to the ES

(2) To regulate CL voltage

(3) Efficient power transfer between smart load and grid through the ES

(4) To control the amount of output current harmonics and level of bus fluctuations caused by random input power swings

In this work, the B2S control circuit meets objectives 1 and 2 while integrating the power to the local grid with the output current of the lower harmonic content (objectives 3 and 4).

 2 ES With Back-to-Back Converter Topology

The ESs in the demand response technology have been widely used for the mitigation of voltage and frequency fluctuations and reduction of power imbalance. ES has been demonstrated to track the variations in reference power. When the reference power is surplus than the requirement of critical and NCLs, it is necessary to modify the ES with existing full bridge inverter configuration to feed the available surplus power to the main grid. The DC power side of ES must be interfaced with the AC grid. It is essential to include energy storage technology in the power converter to meet the difference in power between the two sides. The ES-B2B configuration is illustrated in Figure 1. For efficient power flow between the ES and the grid, it is crucial to control the DC link voltage to be constant. This can be well explained using two cases:

(1) When the reference power is surplus than the requirement of critical and NCLs, the ES transfers the surplus power to the grid through the DC link and converter circuit. Else, if the DC link voltage is less than the reference value, some amount of power is utilized to charge the DC link capacitor and the remaining is fed to the grid. Consequently, the power fed to the grid is reduced.

(2) During voltage fluctuations, the DC supply required for the inductive/capacitive mode of operation of ES is obtained from the DC link capacitor. So, the DC capacitor discharges to maintain its voltage at a fixed voltage. It takes power from the grid through a rectifier circuit.

Two-stage control circuit for bidirectional power flow control.

During both cases, DC bus voltage control is critical for bidirectional power flow and better performance of ES. When power is fed to the grid, it is mandatory to control the harmonic content in current as per IEEE std.519-1992. Power converter is a non-linear load. Thus, when it is operated as a rectifier, the current drawn from the grid consists of some ripples. All these demand the design of a current controller. To study the performance of ES-B2B, the mathematical modeling of the DC link voltage control circuit is done.

A novel single phase two-stage topology with power electronic converters is used to be implanted for ES-B2B. The first stage for power extraction and to provide a suitable voltage level for the second stage is realized with an instantaneous DC bus voltage controller. Second stage to generate and inject good quality of grid power.

The proposed topology includes four controllers: first, an instantaneous DC link voltage controller to maintain the ES DC-link voltage at the required level, second, an active power PI controller to control the power transfer between smart load and grid through ES, third, a feeder voltage PI controller to regulate mains voltage, and finally, an HB current controller to control the ES output voltage itself and force it to match a sinusoidal reference computed from the other control loops.

 3 Design of Instantaneous DC Bus Voltage Controller

In a two-stage topology, as illustrated in Figure 1, the first stage performs to maintain the DC link voltage as constant. In the second stage, this DC power is converted into the AC power fed to the grid with low ripple content. At the output of the second stage, the AC filter is used to filter out the harmonics in power fluctuations. At the DC link passive element, a capacitor is used to maintain the constant DC link voltage. A two-stage control system with single-phase AC integration suffers with two issues at the DC link voltage, the second-order ripple content, which makes the DC link voltage subjected to the variation. It also affects the power drawn from the grid. Sometimes, these power fluctuations are high, which activate the protective device and cause an interruption in the supply, and the efficiency of the system also decreases. So, the design of the DC link is critical and summarized as follows: 1) the average DC link capacitor energy is constant over duration; 2) it reduces the variations in stored energy; and 3) due to the above two issues, the grid current with harmonics causes to loss unity power factor operation the converter. The size of the overall system highly depends on the size of the DC link capacitor. In single-phase topologies, the control loops cannot be easily put within the framework of LTI systems, and this makes the control objectives challenging.

The bus voltage control is achieved by comparing the actual DC link voltage with the reference value. The obtained error in the DC link voltage is converted into the magnitude of the reference grid current signal with the help of a PI controller. This magnitude is converted to a synchronized reference current signal with the help of PLL. The reference current signal is compared with the actual grid current. The error in the grid current is given as an input to the current controller to generate switching pulses to the converter to maintain a constant DC link voltage, but here, the overall system becomes non-linear due to the non-linear relation between the DC bus voltage and its energy variations. It highly depends on the size of the capacitor.

To meet the aforementioned objectives, the major work carried out is the design of the DC bus voltage controller comprising a voltage control loop, inner current controller, and PLL to provide synchronized signals with the grid voltage.

3.1 Design of Voltage Control Loop

The entire process to design the DC bus voltage controller is performed in 3 stages. Firstly, the simplest mathematical modeling is carried out by substituting the current control loop with unity. In the next stage, the modeling of the current controller with resonant control is performed. However, to overcome the complex design and to make the analysis simple, an HB current controller is also implemented. Lastly, the modeling of PLL is detailed to provide synchronized signals with the grid voltage. The inverter injecting current into the grid is considered as positive.

The DC power side of ES has constant power, P D c = P o = V D C I D C

On the AC side of the grid, power is given by P a c = ϑ g i g ( V g ⁡ cos ⁡ ω t ) ∗ ( I g ⁡ cos ( ω t − ø ) )

With reference to Figure 1, P o is the average AC power that is equal to the DC link power P D C in a loss converter operation. The second harmonic power variation exists due to the conversion of power from AC to DC and vice versa.

The power balance equation at the DC link capacitor is given below.

Assuming that there is no phase-shift and unity power factor, Eq. 2 becomes P a c = P o + P o ⁡ cos ( 2 ω t )

The power balance equation at DC link is as follows: P i n − C d c ϑ d c d ϑ d c d t = P o u t ϑ d c i d c − ϑ g i g = 1 2 ϑ g i g ( cos ⁡ 2 ⁡ ω t )

Consider P i n , P o u t   as the input and output powers across the DC link, C d c . Applying the power balance equation to the DC link and neglecting the losses in the flow of this power from the DC side to the grid through the power converter and first-order L filter, P i n = P b u s + P o u t + P l where P l is instantaneous power of the grid-side inductance, L. P l = L d i g d t ( i g ) P o u t = ϑ g i g

The power across the DC link, C d c , is P b u s = d d t ( w b u s ) where w b u s   is the instantaneous energy stored in the capacitor. It is expressed as w b u s = 1 2 C d c ( ϑ d c ) 2 where ϑ d c   i s   t h e   i n s t a n t a n e o u s   v o l t a g e , V d c   i s   t h e   D C   v a l u e   o f   t h e   b u s   v o l t a g e .

To develop the model, the approximation for the DC bus is considered as discussed in Taghizadeh et al. (2018a), w b u s ≅ C d c V d c ϑ d c − 1 2 C d c V d c ∗ 2 Using,   ϑ d c = ( V d c ∗ + Δ ϑ ) ϑ d c = W b u s + 1 2 C d c V d c ∗ 2 C d c V d c ∗

Eq. 13 can be illustrated with the outer voltage control loop as depicted in Figure 2.

DC link voltage control loop with current controller.

 3.1.1 Simplified Model of DC Bus Voltage Control System

Though the operation of an inverter, the current control loops are linear; some non-linearities are brought by the time-varying terms before and after the current control loop. Thus, in order to derive a linear system, the assumptions are made that 1) the current control loop is ideal and its transients are neglected as compared to the bus voltage control loop and 2) non-linearities are neglected. Then, the design and analysis of the voltage control loop are performed in this section. V p l l = sin ⁡ ω t ϑ g = V g ⁡ sin ⁡ ω t V p l l ϑ g = V g ⁡ sin 2 ⁡ ω t = V g 2 − V g 2 cos ⁡ 2 ⁡ ω t

To obtain a simplified diagram, the current control loop is substituted with the unity gain and Eq. 16 is approximated with V g 2 . ( V d c ∗ − ϑ d c ) k ( 1 + 1 s τ ) ( V g 2 ) ( 1 s ) ( − 1 C d c V d c ∗ ) = + ϑ d c

3.2 Hysteresis Band Current Controller

As per the discussions made in Section 2, the modeling of ES in B2B configuration involves two loops: DC bus voltage control and current control. The hysteresis current control is simple to implement and a robust control. The reference and the measured currents are compared. The controller limits the current error between the set maximum and minimum band limits to generate switching signals to the VSI to ensure an actual current to precisely track the reference current is achieved.

 3.3 Enhanced PLL

The main objective of a PLL is to produce a sinusoidal signal whose phase is coherently the same as an input signal. A PI controller is designed to ensure that the dq-frame is always aligned along the d-axis of the input grid voltage, forcing the q-axis component to zero. The PLL adapted in this work is the EPLL given by Karimi-Ghartemani and Iravani (2002). In addition to the conventional PLL, it has an outer loop for amplitude estimation as illustrated in Figure 3. It is robust to the changes in internal parameters and external noise and gives the amplitude and phase of the input signal as given by Karimi-Ghartemani (2014).

Basic scheme of a single-phase EPLL.

With reference to Figure 3, when an input signal V i   ( t ) , EPLL gives the output signal V 0 ( t ) of frequency and simultaneously extracts its amplitude A ^ , phase ( θ 0 ) , and frequency ( ω 0 ) . The state-space representation of the above system is illustrated in Eq. 20 from Figure 3, [ x 1 ˙ x 2 ˙ x 3 ˙ ] = [ − k 2 0 0 0 0 − k i V i 2 0 1 − k p V i 2 ] [ x 1 x 2 x 3 ] + [ k 2 0 0 ] V i + [ 0 k i V i 2 k p V i 2 ] θ i + [ 0 0 1 ] ω v c 0

EPLL gains K, k p , k i , and time constants and influences its operating characteristics—the lock time of loop, estimation time, and accuracy.

 3.4 Dynamic Modeling of DC Bus Voltage Controller

For modeling the DC bus voltage, between the inverter and Grid “L,” the filter is taken. The state-space representation of this with the inner current control loop and outer voltage control loop is given by Taghizadehet al. (2018b): [ x 1   ˙ x 2     ˙ x 3   ˙ ] = [ 0 − ω − K r ω 0 0 1 / L 0 K p ] [ x 1 x 2 x 3 ] + [ K r s i n ω t 0 K p L s i n ω t ] I g ∗ y = [ 0 0 1 ] [ x 1 x 2 x 3 ] ; ( i . e ) [ y = I g ]

The characteristic equation of the closed-loop system is ( 1 + G ( s ) H ( s ) ) = 0 where H ( s ) = k V g 2 C d c V d c ∗ 1 s ( 1 + 1 s τ ) .

The resultant equation is given below: 1 − k V g 2 C d c V d c ∗ 1 s ( 1 + 1 s τ ) ( S ( K r 4 L ) + ( 1 2 L ) s 2 s 2 ( s + K p 2 L ) + K r s 4 L ) = 0

To determine the value of‘ k ′ for stability conditions, the Routh–Hurwitz stability criteria is applied and we obtain k < K p K r C d c V d c V g K p L − V g K r L − 2 V g L τ

The stability condition demands k < 0 and τ > 0 . In the design process, the values of k , τ are correspondingly adjusted to curtail bus voltage transients and grid current harmonics.

 4 Simulation Results

In order to validate the proposed controller configuration, the system presented in Figure 1 is simulated in MATLAB/Simulink. Various parameters are designed as discussed in the following sections. The renewable energy source is implemented with the PV source. The specifications of the source are detailed in Table 1. The PV arrays are designed for 24.9 kW, 170 V. A boost converter with MPPT, which is used to extract the maximum power and also increases the voltage to 230 V, is tied to the grid. The control of power flow across the grid and smart loads by ES-B2B is studied. In this section, for a steady-state operation and dynamic performance for step change in reference power analyzed. The active and reactive power adjustments are made to reach a steady state within 4 cycles.

System specifications.

PV system parameters Value Parameter Value
Maximum voltage (Vm) 31.1 V Regulated mains voltage 230 V
Current at maximum power (Im) 8.05A DC bus voltage 400 V
Open-circuit voltage (Voc) 37.8 V Line resistance 0.1 Ω
Short-circuit current (Isc) 8.28 A Line inductance 2.5 mH
Total no. of PV cells 60 Critical load (16 Ω + 0.2 mH)
Temperature coefficient of Voc (Kv) −0.30%/K Non-critical load (8 Ω + 2.3 mH)
Temperature coefficient of Isc (Ki) 0.04 K Inductance of low-pass filter 3 mH
Saturation current Io1 = Io2 1.045 × 10−9 A Capacitance of low-pass filter 100 µF
4.1 Design of DC Link Voltage Control Loop

In the DC link voltage control loop, the DC link capacitance, the bus voltage controller gains k and t are the other design parameters. With reference to Chien and Tzou (1998), the DC link capacitance is designed using Eq. 23: C d c ≥ Δ P m a x T r 2 V d c Δ V d c ( m a x )

The DC link capacitance is determined as 4,700 mF; τ is assumed as 0.1, and using the current controller gains, the DC link values in Eq. 23 limits are K < − 0.08019 .

4.1.1 Design of Grid-Side Filter Parameters

The properties of the output filter of the voltage source inverter can be characterized by IEEE-519 and IEC 62040-3 American and European standards. The harmonic component with the frequency equal or very close to the switching frequency has the highest amplitude, and this harmonic should be efficiently damped. Here, the LC filter is used. Using Eq. 24 given by Afzal et al. (2016) and the values in Table 2, the filter inductance and capacitance are determined as 2 mH and 20 μF, respectively. The grid-side filter is designed using Eq. 24. I g m a x ( 2 π f L g ) < 0.03 V i n v , Filter   capacitance, C g = 1 ( 2 π f c ) 2 L g

Parameters for DC bus voltage controller for ES.

Parameters Values
DC link voltage control loop
 Maximum load variation, V d c ( m a x ) 200 W
 Filter delay time, T r 0.02 s
 DC-link capacitor voltage, C d c 400 V
Voltage variation in the DC-link capacitor, Δ V d c ( m a x ) 0.01 V
EPLL
 Integral time constant 0.02 s
  K A 600
 Proportional gain, K p 2,000
 Integral gain, K i 20
Grid-side filter
 Maximum RMS value of the load current, I g m a x 10 A
 Frequency of the output voltage, f 50 Hz
 Inverter output voltage, V i n v 230 V
 Switching frequency, f s w 10 kHz
 Filter cut-off frequency, f c < 1 10 f s w 765.77 Hz
4.2 Steady-State Performance

If V C r i t   , R C r i t , X C r i t are the RMS voltage, resistance, and reactance parameters of a CL, then the powers of the CL and NCL are determined from the load impedance values, with the RMS values of voltages across them as Real   power   of   critical   load, P C r i t = V c r i t 2 R C r i t

Applying the values of the CL to Eq. 25, the CL power is obtained as 3.3 kW. In this case, the power-tracking operation of the ES-B2B converter under a steady state is analyzed. The reference power of 8 kW is given to the ES system. Simulation is conducted for 6 s. The tracking of reference power by ES, power absorbed by the CL, NCL, and remaining power fed to the grid are illustrated individually in Figure 4. When the reference power of 8 kW is given, the constant real power of 3.3 kW is absorbed by the CL of 16 Ω + 0.2 mH. The power absorbed by the NCL is 1.7 kW, and the remaining power of 3.9 kW is fed to the grid through the ES-B2B converter. The transient operation of the ES in this case is 1 s. The peak overshoot for the reference actual power, critical power, and non-critical power are 11, 3.9, 5.5, and 5.2 kW. The THD of the grid current without filter is 3.61%, while the filter THD of the grid current is 3.59% as illustrated in Figure 5.

Power variations for a constant reference power to ES.

(A) THD in grid current without filter (B) THD in grid current without filter. (C) Tracking of reference current by HB controller.

 4.3 Step Change in Reference Power

In this section, the performance of ES-B2B for the step change in reference power is demonstrated. The investigation of bidirectional power flow by ES is done in 2 cases: case 1—the reference power is changed from 8 to 4 kW and case 2—the reference power is changed from 8 to 2 kW. This is explained in Section 4.3.2. In case 1, the reference power meets the CL power requirement. whereas it is not sufficient in case 2. The CL requires a power of 3.3 kW. However, when the reference is below this value, the conventional power flow is reversed.

4.3.1 Change in Reference Power From 8 to 4 kW

At t = 3 s, the reference power is changed from 8 to 4 kW. The tracking of the reference power by ES, power absorbed by CL, NCL, and remaining power fed to the grid are illustrated individually in Figure 6. It is clearly observed that when the reference power is changed from 8 to 4 kW, the power fed to the grid is changed from 2 to 0.5 kW.

Power variations for step change in reference power.

However, the real power absorbed by a CL is regulated to 3.3 kW by the ES-B2B topology. The power drawn by an NCL also changes from 2 to 0.5 kW. The transient operation time of the system in this case is 1 s. This total power adjustment is done by the PQ controller of the ES to meet the change in reference power. The power flow to the grid is controlled by the DC link voltage controller.

 4.3.2 Change in Reference Power From 8 to 2 kW

At t = 3 s, the reference power is changed from 8 to 2 kW. The power required by a CL is 3.3 kW, but when the reference power given to the ES system is 2 kW between 3 and 6 s, the ES-B2B configuration draws the power from the main grid. It is clearly highlighted from Figure 7 that the controller can efficiently handle the variations in the reference power values below the CL requirement and maintain constant power for the CL.

Power variations for step change in reference power.

The tracking of the reference power by ES, the power absorbed by the CL and NCL, and the remaining power fed to the grid are illustrated individually in Figure 7. It is clearly observed that when the reference power is changed from 8 to 2 kW, 1.9 kW of power is drawn from the main grid by ES-B2B. About 3.3 kW of power is fed to meet the CL requirements, and the remaining 0.1 kW of power is absorbed by the NCL with the transient time operation of 1 s. When the reference power is 2 kW, ES draws a power from the local grid through B2B configuration, to meet the CL power demand. It means that the PQ controller of the ES and the DC link bus voltage controller are operating cordially to meet the reference power demand and CL power demand. Overall, this controller has an extensive transient and dynamic response.

The inverter is controlled by the instantaneous DC voltage controller. The DC link voltage is always maintained to a 400 V reference value. For a step change in the reference power at 3 s, it is observed that the large transients on the DC bus are limited. Figure 8 confirm that the steady-state performance in the tracking of the reference power is effectively obtained with the instantaneous DC bus voltage controller in 2.8 s than the conventional bus controller with 3.2 s.

DC link voltage controllers in tracking of reference power.

The steady-state tracking error of the grid current is more with the PR controller than HB controllers. A detailed examination of the quality of grid currents is performed using the FFT analysis. Harmonic distortion is remarkably reduced to 3.85 with an HB current controller in comparison with 4.54 with a PI controller and 4.12 with a PR controller. As mentioned earlier, one of the major requirements of grid-tied configurations is the power quality. The injected current into the grid should have a THD below 5%. This is the responsibility of the employed current controller. Three different current controllers—PI, PR, and HB current controllers—are implemented to handle harmonic distortion.

A detailed study of the harmonic components specific to the low-order frequency and THD in the grid current is presented in Figure 9. THD% as well as harmonic components (DC, 2nd, 3rd, 5th) are considerably lowered with the HB controller. It is to be noted that the fundamental in grid current is reduced by almost 3 times (29.47–8.046) using an HB controller when compared to the PI controller.

Harmonic content in grid current with PI, PR, and HB controllers.

 4.4 Change in Critical Load

In this section, the behavior of the system with ES-B2B when subjected to the variation in CL is studied. CL 2 (16 Ω + 0.2 mH) is connected in parallel to the existing CL 1 of the same value. It is connected using a switch from 2 to 4 s. The total simulation is 5 s. The reference power of 8 kW is given to the ES. From Figure 10, it is clear that under normal conditions (0–2 s, 4–5 s) and also during load variations (2–4 s), the demand of the smart load follows the reference power strictly while maintaining voltage stability and power balance.

Performance for change in critical load and Pref = 8 kW.

When CL 2 is connected, the net power absorbed by both the CLs is doubled. It was initially 3.3 kW and now becomes 6.6 kW. A change in the CL slightly affects the power absorbed by the NCL, whereas it remarkably affects the flow to the grid. The power absorbed by the NCL is slightly reduced from 0.9 to 0.7 kW, whereas the power fed to the grid is decreased from 3.8 to 0.7 kW. The efficient power balance between the grid and the ES system is sustained with constant DC link voltage at 400 V. The ES controller precisely regulates the PCC voltage to 230 V. The transient operation of the ES system is 0.5 s.

It is clearly reviewed from Figure 11 that the ES with the proposed B2B converter efficiently handles dynamic load changes when the reference power is below the CL power. To examine this operation, the reference power of 5 kW is given to ES. CL 1 is (16 Ω + 0.2 mH). The power required by it is 3.3 kW. CL 2 is also of the same rating as CL 1. It is connected between 2 and 4 s. Thereby, the net power absorbed by the CLs is doubled to 6.6 kW. The available reference power from RES is less than the required CL power. Now, the ES-B2B topology facilitates the power flow from the main grid. It is clearly shown in subplot 4 of Figure 11 that during 0–2 s, 1.7 kW of power is fed to the grid and with the change in the CL, 2 kW power flows from the grid to the CL with the transient operation of the ES system being 0.5 s.

Performance for change in critical load and Pref = 5 kW.

 4.5 Change in Non-critical Load

In this section, the behavior of the system with ES-B2B when subjected to change in an NCL is examined. The chosen NCL-2 of (8Ω + 2.3 mH) is connected in parallel to the existing NCL for 2–4 s. Total simulation is conducted for 5 s. The reference power to ES is given as 8 kW. Subplot 1 of Figure 12 highlights that the tracking of the reference power by ES is not affected by the change in an NCL.

Power across various elements for change in Non-critical load.

Whenever an NCL changes, the ES controller operates in 0.4 s and controls the smart load power consumption to 8 kW. The net power required by NCLs is almost doubled from 1.7 kW during 0–2 s to 3.4 kW during 2–4 s. The ES ensures a constant power of 3.3 kW to the CL. When NCL 2 is connected across the existing load, the net resistance of the NCL becomes half. This enables the load to draw more current, and thereby, the voltage across the NCLs is also halved. It is clearly shown in subplot-2 of Figure 13 where the voltage across NCL is reduced from 160 to 80 V. Subplot-1 of Figure 13 corroborates that irrespective of NCL changes, the ES regulates the PCC voltage to 230 V.

Voltage across critical and non-critical load.

 5 Conclusion

When the input real power available is less than the rated power of a CL, the instantaneous DC bus voltage controller enables bidirectional power flow and regulates the active power of the CL to a preset value. With this configuration, the load demand of a smart load follows the reference power for any changes in the PCC voltage, critical load, NCL, and reference power. With an instantaneous DC bus voltage controller, the tracking of real power is attained in lower time in comparison with a conventional DC bus voltage controller, whereas the performance of both the controllers remains almost the same in terms of the peak overshoot. The HB current controller reduces the harmonic content to 3.85% in comparison with the PR controller performance at 4.12%.

 Data Availability Statement

The original contributions presented in the study are included in the article/supplementary material, further inquiries can be directed to the corresponding author.

 Author Contributions

RSRS proposed the concept of the project, and PSV acted as the project administrator. KKD, JVK designed the system model and established the details of the power configuration scheme. KKD and SSR analyzed the data and carried out the simulation. All authors have read and agreed to the submitted version of the manuscript.

 Conflict of Interest

The authors declare that the research was conducted in the absence of any commercial or financial relationships that could be construed as a potential conflict of interest.

 Publisher’s Note

All claims expressed in this article are solely those of the authors and do not necessarily represent those of their affiliated organizations, or those of the publisher, the editors and the reviewers. Any product that may be evaluated in this article, or claim that may be made by its manufacturer, is not guaranteed or endorsed by the publisher.

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