An encapsulating material is required to have chemical stability, hydrophobic nature, thermomechanical properties in a certain suitable range, electrical insulation, thermal stability, and specific dielectric properties (Na et al., 2018). Historically, hermetic packaging with glass, ceramic, or metals (primarily the latter two) was commonly used for housing electronic circuits, making it up to 80% of worldwide microcircuit production in the 1960s. Emerging as an inexpensive alternative in the 1970s, plastic packaging took over virtually all high-volume packaging products, acquiring 97% of the total market share in 1993 and more than 99% by the year 2000. Due to this large-scale adoption, polymer-based compounds have dominated the packaging market in the last 2 decades [(Ardebili et al., 2018, ch.1)]. Figure 1 summarises the timeline of two competing packaging technologies, with all hermetic packaging materials classified as one category.

Thermosetting polymers such as epoxy, polyimide, bismaleimide-triazine, etc. are widely used in packaging materials because of their low dielectric permittivity (Li et al., 2022). Owing to their ability to be moulded, they are also referred to as “moulding compounds.” Their relatively low cost compared to traditional ceramic packages and also comparable reliability make them a more practical choice for packaging. There is a wide variety of resins suitable for Plastic-Encapsulated Microelectronicss (PEMs) (Ardebili et al., 2018, ch.2), (Charles, 1993). Considering the superior electrical performance, achievable thermal and mechanical behaviour, and economical aspects, the use of epoxy-based plastics is widespread for commercial electronic devices (Pecht et al., 1999).

A typical Epoxy Moulding Compound (EMC) is a composite material, utilizing epoxy resin as a matrix along with silica-based filler material and other additives. A wide range of thermomechanical properties can be achieved by varying the quantities of the fillers and additives (Carolan et al., 2016; Kandola et al., 2010). For example, the glass transition temperature T g of moulding compounds can be varied from less than 20°C to greater than 200°C, whereas the modulus of elasticity E can be changed from 2 GPa for the neat resin to over 100 GPa with continuous fibre reinforcement (Mullins et al., 2012). Moulding compounds are generally required to have the glass transition temperature greater than the product’s service temperature ( T g > T s ) for them to remain in the “glassy” region in order to maintain stable dimensions while the product is in-use (Ratna, 2012).

The constitutive materials of EMC help it attain the desired thermomechanical properties. The epoxy resin contributes to excellent chemical resistance, weight reduction due to its lower density, as well as high adhesion strength due to the formation of hydroxyl groups during cure (Na et al., 2018; Mullins et al., 2012). Typically, EMC has a very high filler content (up to 90%), which helps reduce the Coefficient of Thermal Expansion (CTE) and increase the thermal conductivity of the moulding compound (Ardebili et al., 2018, ch.2). It also improves dimensional stability with the resulting low shrinkage and high T g values. Figure 2 shows a cross-section of an EMC specimen observed under a Scanning Electron Microscope (SEM), where a very high content of silica filler can be clearly observed.

The silica-based filler also ensures the reduction of moisture absorption (Sasajima et al., 2016) and of the large CTE-mismatch between silicon die (2–3 ppm/°C) and epoxy resin (above 80 ppm/°C), ensuring less warpage (Teh et al., 2006). The SiO 2 content and particle size of the silica-based filler material controls the viscosity, and therefore, the flowability of the moulding compound can be adjusted. Hardeners improve the heat resistance and storage stability; cure-promoter increases the cross-linking reaction time; and flame-retardants lower the risk of flammability (Linec and Mušič, 2019).

The factors responsible for component degradation can either be “environmental” or “functional” loads. The former depends on aspects such as the geographic location, season, and time of the day, while the latter on the application field and operating conditions such as the power requirement, runtime, etc. These factors can be categorised into eight types–thermal, electrical, mechanical, chemical, electromagnetic, radiation, humidity, and dust (ZVEI, 2015). Among these, harsh conditions such as high temperature, moisture, and mechanical vibrations have the most relevance for electronic components in a broad variety of applications. Exposure to these “stress-factors” alters the thermal, mechanical, electrical, and chemical behaviour of the constituting materials, which influences the performance, behaviour, and lifetime of an electronic component. Figure 4 indicates the distribution of the share of four major “stress-factors” in causing failures in electronic components.

The data originates from a 1990 study by the US Air Force Avionics Integrity Program, which has later been reported on in handbooks such as Pecht (1991) and a variety of publications on the studies of different failure modes in electronics packages (Chu et al., 2013; Xu et al., 2015; Qiu et al., 2022). Temperature is the most significant stress-factor (accounting for more than 50%) to facilitate failure mechanisms in electronic components, while humidity and mechanical vibrations are the next two dominant ones. Failure mechanisms are also often accelerated by these factors, and thus, the knowledge of the exposure of an electronic component to the dominant stress-factors is crucial in determining its current state of degradation and predicting a potential failure mode.

In addition to these factors, exposure to gas (chemical exposure), salt (corrosion), ultraviolet light (ageing effects), electromagnetic radiation, power surges (electromigration), etc. have also been considered as a part of the reliability qualification tests in the recent past (ZVEI, 2015; ITA Labs, 2014; Sierra Circuits, 2021). However, the relevance of these additional factors remains application-dependent, keeping the aforementioned four stress-factors as almost exclusively cited degradation factors in a plethora of publications to date. The modern trends in reliability testing for microelectronics packaging also reflect the same (Bender et al., 2024).

Each of the dominant stress factors has certain degradation effects and associated failure mechanisms. Exposure to high temperature leads to oxidation of the encapsulating moulding compound, which is a chemical reaction leading to the formation of a stiffer layer compared to the original material (Inamdar et al., 2021). A PCB substrate also shows a similar degradation effect with a significant shift in its mechanical properties (Van Dijk et al., 2022; van Dijk et al., 2024). High temperature also accelerates the creep in solder joints, leading to a significant shift in its material properties and, thus, its mechanical behaviour (Lall et al., 2024; Mazumder et al., 2024). Thermal cycling and thermal shocks also have unique effects on the die-attach layer (which sits between the die and substrate for certain packaging configurations) and solder joints, leading to fatigue (Fahim et al., 2019; Abueed et al., 2019).

Humid environments can cause hygroscopic swelling of encapsulating moulding compounds due to moisture diffusion (Kwak and Park, 2015; Teverovsky, 2002; Jansen et al., 2020), which reflects in a change in thermomechanical behaviour (Zulueta et al., 2021). This effect, in particular, is partially reversible through the desorption of moisture, since it is a diffusion-dominated physical phenomenon (Placette et al., 2011; Chen et al., 2015). This degradation primarily leads to delamination, bond wire failure, and cracks in substrates, encapsulation, and solder joints (van Driel et al., 2010). A combination of thermal and humidity loads results in adhesion failure of moulding compounds (Ahsan and Schoenberg, 2014) as well as the “popcorning” effect in electronic packages (Chen and Li, 2011). Hygrothermal exposure causes a combination of physical and chemical degradation effects and has a significant influence on die-level mechanical stresses (Nguyen et al., 2018), which can lead to interfacial delamination (Wang and Wu, 2020).

Mechanical vibrations impose repetitive mechanical stresses on several layers within an electronic package or system (Thukral et al., 2024b). The effects of such a loading condition are heavily reflected in fatigue failure of solder joints (Wang et al., 2017; Libot et al., 2016) and can depend on the magnitude of vibration in a particular direction (Jian et al., 2024). These effects are typically accelerated under thermal loads and thus, a combined degradation due to thermal and mechanical stress has been extensively studied and characterised (Maruf et al., 2024; Arabi et al., 2020) and several board-level reliability studies are designed around solder fatigue under thermal-cyclic and mechanical vibratory loads (Bani Hani et al., 2023; Thukral et al., 2023; An et al., 2018).

The aforementioned stress-factors and corresponding degradation mechanisms and failure modes are applicable to different electronic packages depending on the utilised packaging technology. Simpler chip designs (single chip packaging in Figure 3) can experience a single dominant failure mode, such as wire-bond liftoff or popcorning effect. On the other hand, multi-chip 2D integration or advanced packaging (refer to the rest of Figure 3) have more complex structures and, thus, the complex interaction of multiple layers consisting of different materials. This leads to a combination of failure modes including solder interconnects at different layers, electromigration, and substrate cracking. Bernstein et al. (2024) shows the distribution of most commonly observed package-level failure mechanisms in the field as bond wire failure (32%), die cracking or damage (28%), delamination (13%), substrate cracking (10%) among others. These failure modes are identified using several Highly Accelerated Stress Testing (HAST) and cyclic loading profiles, which are based on temperature variation (thermal cycling, shock, isothermal), humid environments (moisture ingress), and mechanical loads (vibrations) (Bender et al., 2024).

Package-level degradation mechanisms can lead to both package-level failures as well as board-level failures. Figure 5 shows the distribution of different types of package-level and board-level failure modes associated with power electronic systems. The original source (Wolfgang, 2007) is not accessible, but the data were later reproduced in Yang et al. (2010) and Wang et al. (2012). The package-associated failure modes–semiconductors (die), connectors (interconnects), and solder joints–together account for a significant share of 37%. In general, there can be a large number of failure modes for an electronic component or system [(Ardebili et al., 2018, ch.5)]. Thus, a selection is necessary to focus the efforts on modelling the physics-of-degradation and building a physics-based Digital Twin for prognosis. The following three criteria were considered to determine the dominant failure modes and degradation mechanisms: (1) the three dominating stress-factors (viz., temperature, humidity, and vibration); (2) the large volume-share of the encapsulation material with a dominant role in the thermomechanical behaviour of a package; and (3) the trend of commonly observed categories of package-associated failures.

Delamination, i.e., separation of two heterogeneous surfaces, and cracking of materials are two of the most common mechanical failure mechanisms. Delamination is often observed at the interfaces between the moulding compound and other materials, such as EMC-leadframe, EMC-die, etc. Delamination can also lead to crack propagation in the bulk of EMC. Figure 6A shows the schematics of these failure modes, which are mainly caused by the difference between the thermomechanical properties (e.g., CTE-mismatch) and temperature differences between different layers. A cyclic thermal load during the component’s operation causes stress cycling which leads to crack initiation and propagation. Delamination can affect not only the electrical performance but also the thermal performance by altering the heat distribution within the package (Nieuwenkamp and Bosco, 2021).

A cyclic thermal or mechanical load is also a primary cause of crack initiation and propagation within solder joints. Figure 6B depicts a crack in the bulk of solder material, which is also referred to as a Mode-II failure. Solder cracks can also develop within the intermetallic layer formed up to a certain depth from its contact with the metallisation (commonly copper) layer. This is called a Mode-I failure. The former is a predominantly ductile failure due to plastic deformation (i.e., the accumulated plastic strain), while the latter is a brittle failure. A mixed-mode failure can also be observed in solder joints. Both of the described failure modes (illustrated in Figure 6) have one common factor, which is they occur during product-operation, i.e., the in-use phase of an electronic product. Moreover, they can be accelerated by the changed thermomechanical behaviour of a package due to the ageing of the encapsulating EMC. Thus, the changes in material properties of the encapsulating material are of great significance when considering the effects of package-level degradation on the component-level failure modes.

Product-specific health monitoring and reliability prediction can be achieved when its exposure to the dominant stress-factors is known, which can be used to determine the current state of degradation. This requires incorporating embedded sensors and component-level measurement techniques in an electronic system. Thus, certain hardware considerations are necessary to realise the data-driven branch of the Digital Twin architecture presented in Figure 7A, especially the edge-processing aspect, and to establish the data flow from the physical product and its digital models in the virtual space. This is important for the “instance” (DTI) and crucial for the “aggregate” (DTA) phase of the Digital Twin. The hardware requirements are categorised into sensing and processing units.

Predicting failures directly from the collected sensor data is not possible without a robust (purely) data-driven model, which typically requires huge amounts of training data gathered from experiments or in-field use of the product. The hybrid Digital Twin approach for prognostics and health monitoring of electronics (Figure 7) can address this challenge, and thus, linking the sensor data to physics-based models is necessary. Experimentally validated models can then also serve as a source for training data that is convenient and not as resource-intensive as a purely experimental approach. Moreover, these models can extract results from intricate places of the electronic component, serving as “virtual sensors,” where placing and physical sensor or performing actual measurements is either not possible or practical.

As concluded in Section 2, temperature-induced effects on the encapsulating layer of an electronic package are crucial. Thermal ageing results in progressive oxidation of the encapsulating EMC, forming a much stiffer outer layer. This affects the stresses on the EMC-die interface and may accelerate the delamination process. While embedding a piezoresistive stress sensor is a possible solution, it is also resource-intensive. As an alternative, an experimentally validated model of a thermally aged electronic package can be prepared to simulate its thermomechanical behaviour as a function of EMC oxidation. A step-by-step procedure of creating such a continuously updated and experimentally validated model for thermo-oxidative ageing of EMC is demonstrated in Inamdar et al. (2024c). This model can serve as a virtual sensor to extract the stress values along the EMC-die interface to evaluate the risk of delamination.

Figure 8 shows the aforementioned model with a quarter geometry of a flip-chip ball grid array package, that updates the thickness and material properties of the oxidized layer of EMC based on the quantified exposure (i.e., time) to a high temperature ( ≥ 150°C). The top 10 µm thick layer of the silicon die with a 30 × 30 finite element array serves as the virtual stress sensor. The results of von Mises equivalent stress at room temperature (25°C) for four different stages of thermal ageing (viz., 0  h, 1,000  h, 2,000  h, and 3,000 h) are indicated in Figure 8. In this way, high-quality data can be extracted from continuously updated simulation models (Digital Twins). Therefore, in conjunction with the hardware requirements discussed earlier, Digital Twins for degradation models should be used for the PHM of electronic components.